1. Technical Field
The present invention is generally directed to an improved data processing system in which information may be passed directly from one device driver to another. More specifically, the present invention is directed to a system and method for passing Direct Memory Access (DMA) configuration information from one device driver to another in order to initialize devices for DMA operations.
2. Description of Related Art
In the Peripheral Component Interconnect (PCI) system architecture, a PCI bus has several child devices coupled to the PCI bus. Direct Memory Access (DMA) operations are one of the mechanisms used by such child devices to transfer data to and from system memory via the PCI bus. The PCI bus has an allocated portion of system memory that may be used to perform DMA operations, i.e. a DMAble address space or memory region. In order to perform such DMA operations, each child device is assigned a certain range of addresses within this DMAble address space. A child device is configured to perform DMA operations within its allocated portion of the PCI bus' DMAble address space.
The DMAble memory region is described using three parameters: a starting address that identifies where the DMAble memory region begins, a size that designates how large the DMAble memory region is, and a unique identifier related to the DMAble region. Since the entire DMAble memory region belongs to the PCI bus and then portions of this DMAble memory region are carved out for each of the child devices, the information regarding the DMAble memory region is maintained at the PCI bus node level in an Open Firmware Device Tree.
Open Firmware provides the ability to generate hardware independent boot code, firmware and device drivers for computer systems. The basic tasks of boot code are 1) build a device tree, which the operating system then uses to discover what devices are available to it and how to use them, and 2) boot device drivers. The particular format of the device tree is operating system dependent, but all device trees have a great deal in common. That commonality can be expressed in a common language independent of the operating system. The format of an Open Firmware Device Tree is such a common language.
In a typical installation, the operating system uses client interface calls to translate the Open Firmware Device Tree into the operating system's own format. The Open Firmware Device Tree is a generic and simple format for a device tree. It can be used to represent the various entries in a device tree for just about any operating system. Like any tree, it consists of nodes, some of which are leaf nodes, i.e. nodes that have no children. Every node has one parent, except for the top node. Each node has a node name, and a list of “properties” and “methods”. In fact, the node name is a property, one that is required for every node. The properties are named data. Open firmware makes no restrictions on how the operating system will eventually use this named data, except for reserving certain names to have certain meanings: the “name” property, for example, is always the node name. This named data may also be of any type: string and integer types are specifically supported, while compound types may be grouped together out of combinations of “int,” “string” and “bytes”, the latter being for any length of arbitrary consecutive bytes.
As mentioned above, with such an Open Firmware Device Tree, the information about the DMAble memory region or address space is part of the PCI bus node in the Open Firmware Device Tree. During configuration of the system and its devices, this DMA memory region information is passed to the PCI bus driver, during configuring of the PCI bus and its child devices, so that the PCI bus driver carves out portions of this DMAble memory region for each child device as the devices register for DMA operations with the PCI bus driver. Thus, it is entirely up to the PCI bus driver's discretion as to which portion of the DMAble memory region is assigned to each child device. In other words, the PCI bus driver does not need any additional information from the child devices in order to apportion portions of the DMAble memory region to child devices.
With virtual input/output (I/O) buses and devices, a different situation is introduced. With virtual I/O (VIO), there is one DMAble address space per device. These DMAble address spaces are not part of a larger address space, such as the DMAble address space allocated to the PCI bus described above. In other words, the DMAble address space allocated to each device is not carved out of a larger DMAble address space that the VIO bus owns but instead, is a DMAble address space owned by the device in its entirety. As a result, the three pieces of information described above, i.e. the starting address, size and identifier of the virtual address space, is present within the device nodes of the Open Firmware Device Tree.
The device configuration happens in a similar manner as discussed above with regard to the PCI bus. That is, the same hierarchical order where the bus is configured before its children is used to perform the device configuration. The problem, however, is that now the VIO bus does not know about the DMAble address space assigned to the devices and thus, DMA operations cannot commence. Therefore, it would be desirable to have a mechanism for informing the VIO bus of the DMAble address space allocated to a device coupled to the VIO bus so that DMA operations may be performed via the VIO bus to system memory.